DesCyPhy Lab

Lab News

Our lab has moved to UC Berkeley. Prof. Nuzzo is accepting new students. Please feel free to visit his website to learn more about his research and how to apply.

Lab Introduction

We focus on cyber-physical system design and trustworthy SoC design.

Lab Members

• Advisor: Prof. Pierluigi Nuzzo
• Ph.D. students:
  • Nikhil Vijay Naik
  • Kaixin Yang (me)
  • Yifeng Xiao
  • Kevin (Chia-Ming) Chang
  • Matthew Low
  • Zhiyu Ni

Alumni

• Postdoc:
  • Dhruva Kartik (Amazon)
  • Michele Lora (Assistant Professor, DIMI, University of Verona, Italy)
  • Luca Geretti (Assistant Professor, CS, University of Verona, Italy)
  • Dengwang Tang (eBay)
• Ph.D.:
  • Nathan Dahlin (Assistant professor at ECE, SUNY Albany)
  • Yinghua Hu (Synopsys)
  • Krishna Chaitanya Kalagaria (Postdoctoral Scholar, University of New Mexico)
  • Chanwook Oh (Apple)
  • Subhajit Dutta Chowdhury (AMD)
  • Muhammad Waqas (Zoox)

Publications

Book Chapter

1. Y. Hu, K. Yang, S. Nazarian, P. Nuzzo, "SANSCrypt: Sporadic-Authentication-Based Sequential Logic Encryption," in VLSI-SoC: Design Trends, Springer, pp. 255-278, Jul. 2021.

Journal Paper

1. Y. Hu, Y. Zhang, K. Yang, D. Chen, P. A. Beerel, P. Nuzzo, "On the Security of Sequential Logic Locking Against Oracle-Guided Attacks," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Mar. 2023.

Conference Papers

1. Y. Hu, K. Yang, S. Dutta Chowdhury, P. Nuzzo, "DECOR: Enhancing Logic Locking Against Machine Learning-Based Attacks, International Symposium on Quality Electronic Design(ISQED), Apr. 2024.
2. S. D. Chowdhury, K. Yang, P. Nuzzo, "Similarity-Based Logic Locking Against Machine Learning Attacks," Design Automation Conference (DAC), Jul. 2023.
3. D. Chen, X. Zhou, Y. Hu, Y. Zhang, K. Yang, P. A. Beerel, P. Nuzzo, "Unraveling Latch Locking Using Machine Learning, Boolean Analysis, and ILP," International Symposium on Quality Electronic Design (ISQED), Apr. 2023.
4. Y. Hu, Y. Zhang, K. Yang, D. Chen, P. A. Beerel, P. Nuzzo, "Fun-SAT: Functional Corruptibility-Guided SAT-Based Attack on Sequential Logic Encryption," Proc. IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp. 281-291, Dec. 2021.
5. S. Dutta Chowdhury, K. Yang, P. Nuzzo, "ReIGNN: State Register Identification Using Graph Neural Networks for Circuit Reverse Engineering," Proc. Int. Conf. Computer Aided Design (ICCAD), pp. 1-9, Nov. 2021.
6. Y. Hu, K. Yang, S. D. Chowdhury and P. Nuzzo, "Risk-Aware Cost-Effective Design Methodology for Integrated Circuit Locking," Proc. IEEE/ACM Design Automation and Testing in Europe Conf. (DATE), pp. 1182-1185, Feb. 2021.
7. Y. Hu, K. Yang, S. Nazarian and P. Nuzzo, "SANSCrypt: A Sporadic-Authentication-Based Sequential Logic Encryption Scheme," Proc. IFIP/IEEE Int. Conf. Very Large-Scale Integration (VLSI-SoC), pp. 129-134, Oct. 2020.